[Hiring] ASIC Verification Engineer @Lumiere Systems

Role Description

This is a core Engineering Role.

• Candidate can work anywhere in the USA who can work in EST time zone.
• Candidate might be asked to travel to Paris every quarter for 1 week based on client needs.
• It will be nice if the candidate knows French language.
• Duration: 12 months.
• Rate: Open and flexible for the right candidate.

Core responsibilities:

• Experience in CortexA9 - newer version of Cortex is preferred.
• Experience in SoCs based on both Cortex‑A and Cortex‑M families.
• Experience in Cortex‑A9 includes:
  • Multi‑core MMU‑based systems.
  • Shared L2 and private L1 cache hierarchies.
  • Cache coherency validation.
  • AXI/APB interconnects.
  • DMA, interrupts, power states, and CoreSight/JTAG‑based debug.
  • All implemented in full UVM environments using golden‑model–driven tests and ARM VIP for stress traffic.
• Experience in Cortex‑M4 and Cortex‑M55 based SoCs, focusing on:
  • Low‑power architectures.
  • Independent cores.
  • Measurement flows.
  • Power management.
• Strong end‑to‑end view from ultra‑low‑power microcontroller designs to high‑performance application processors.
• Assure the overall quality of designs contributing to exciting launches of wireless portable hardware at Snap.
• Strong focus on ARM IPs (CPU (Cortex-A v9 arch), GPU (Mali), debug (CSS600, CoreSight), etc.) for reviewing architectural/design decisions and ramping up on verification of these blocks.
• Serve as an individual contributor to own and develop the verification of core IP blocks.
• Ownership throughout the whole project lifecycle, including:
  • Specification reviews.
  • Verification plans.
  • Test case development.
  • UVM environments.
  • Coverage analysis.
  • Debugging.
  • GLS, etc.
• Work closely with other teams to gather relevant information and share knowledge about design to improve requirements and specifications, providing vital feedback in debugging efforts.
• Collaborate with the global verification team to improve processes and launch initiatives to enhance overall design quality and working methods to become the best in class verification team.

Qualifications

• Proven (5+ years) hands-on experience with state-of-the-art verification methodologies and processes, such as:
  • UVM / SystemVerilog.
  • Formal verification.
  • Constraint-random verification.
  • Assertions.
  • Coverage metrics.
  • Coverage analysis.
  • Gate Level Simulation.
  • Key Performance Indicators testing.
• Strong understanding of ARM related IPs is required: CPU (Cortex-A v9 arch), GPU (Mali), debug (CSS600, CoreSight), etc.
• Hands-on experience with designing and implementing C based test-cases to configure and test the ARM IPs.
• Ability to re-use the manufacturer provided test benches.