[Hiring] Principal SOC Performance Analysis Engineer @BLUE ORIGIN

Role Description

As a Principal SOC Performance Analysis Engineer on the ASIC Engineering SOC Team, you will own performance analysis for a satellite communication System on Chip (SOC) supporting the TeraWave program. This is a senior individual contributor role with technical leadership scope and no direct reports. You will set the performance analysis methodology from pre-silicon modeling through emulation based verification and post-silicon validation, and your results will directly shape architectural decisions across hardware, firmware, and software teams.

Responsibilities:

• Develop pre-silicon performance models for satellite communication PHY IP and Arm core subsystem workloads
• Analyze multi-channel LPDDR6 bandwidth, latency, and arbitration across concurrent SOC traffic flows
• Define and verify performance requirements for L2 acceleration data paths
• Characterize Ethernet throughput and packet processing rates under representative load
• Execute performance verification and functional testing on emulation platforms before silicon tape out
• Validate post-silicon performance against pre-silicon projections and document correlation results
• Partition performance budgets across L1 PHY, L2 software and firmware domains
• Collaborate with architecture, design, and software teams to resolve identified performance bottlenecks

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field
• Minimum 10 years of experience in SOC architecture, performance analysis, or verification
• Experience with SOC performance modeling for multi-core processor based designs
• Experience with memory subsystem bandwidth and latency analysis for DDR or LPDDR
• Experience using hardware emulation platforms for pre-silicon performance or functional testing

Requirements

• Master's degree in Electrical Engineering, Computer Engineering, or related technical field (preferred)
• Experience with satellite communication or wireless physical layer signal processing and L1 functions (preferred)
• Experience with Arm multi-core subsystems supporting Linux SDK or board support package environments (preferred)
• Experience with LPDDR6 or next generation memory interface bring up and performance tuning (preferred)
• Experience analyzing high speed Ethernet performance and packet processing throughput (preferred)
• Proficiency with C, C++, SystemC, or Python for performance modeling and test automation (preferred)
• Strong written and verbal communication skills for presenting analysis results to technical stakeholders (preferred)

Benefits

• Medical, dental, vision, basic and supplemental life insurance
• Paid parental leave
• Short and long-term disability
• 401(k) with a company match of up to 5%
• Education Support Program
• Stock Options for all regular employees (working at least 20 hours/week)
• Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays
• Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company's intent to reward individual contributions and enable them to share in the company's results