[Hiring] Digital ASIC Design Engineer @AttoTude

Role Description

We are seeking an experienced Digital IC Design Engineer to join our growing team. In this role, you will be part of an experienced design team developing cutting-edge DSP and mixed-signal ICs. This is a hands-on technical position that requires in-depth technical expertise, and the ability to work in a team of highly experienced engineers to accomplish the goals.

• Flow system level requirements into Architecture and Design Specifications
• Work closely with Comm Systems Engineers to recommend implementation options for best power, performance, and area.
• Document and write RTL code to meet system requirements
• Write SystemVerilog testbenches and testcases to fully verify the design
• Develop timing constraints, Synthesize the design and perform Static Timing Analysis and Timing Closure.
• Perform gate level simulations.
• Support lab and HW/SW integration post-tapeout
• Collaborate with cross-functional teams to ensure timely project execution and design tape-outs
• Stay updated with the latest trends and technologies in wideband high speed IC design and apply them to improve project outcomes
• Occasional travel to the Bay Area (<10%) for remote position

Qualifications

• 5+ years of hands-on experience in CMOS (bulk and FinFET), digital IC design in various process technologies
• Proven experience in strong coding/verification in SystemVerilog is required
• Scripting language experience: Tcl, Python, and shell scripts required.
• Bus interfaces: PCIe, AXI, UCIe, SPI, I2C, APB
• Strong communication and teamwork skills
• Bachelor’s Degree in Electrical Engineering or related field is required
• Master’s Degree in Electrical Engineering, Computer Engineering or a related field is preferred

Requirements

• Experience designing high speed Modems, SerDes, DSP blocks, FFTs, clock recovery, carrier recovery, digital filters, CTLE, DFE and MLSE.
• Experience matching and debugging Matlab models and vectors in RTL/gate level simulations.
• Experience working on a multidisciplinary team with Systems, RF, Mixed Signal, and SW engineers
• Experience with Cadence tools: XCelium, Genus, Tempus, Conformal, and Voltus
• Experience delivering IP blocks to internal and external customers
• Ability to drive innovation and implement new design methodologies.

Benefits

• Work at the forefront of semiconductor research and innovation in digital communications.
• Collaborate with a multidisciplinary team driving the next generation of THz technology
• Access to state-of-the-art tools and processes at the leading-edge of ASIC development.
• Competitive compensation, professional growth, and opportunities for scientific contribution.