[Hiring] DFT MBIST Staff Engineer @The AES Group

Role Description

We are seeking an experienced DFT MBIST Staff Engineer to join our SoC Design-for-Test (DFT) team. This is a hands-on role focused on Memory BIST (MBIST) implementation using Synopsys MBIST/SMS. The ideal candidate will have strong experience owning the complete MBIST lifecycle, including:

• Insertion
• Integration
• Verification
• Simulation
• Pattern generation
• Diagnostics
• Silicon bring-up

The candidate should be able to work independently with minimal supervision.

Qualifications

• 8+ years of hands-on DFT experience, with significant MBIST expertise.
• Strong hands-on experience with Synopsys MBIST (SMS5/SMS6).
• Proficiency with Synopsys VCS for MBIST simulation and verification.
• Strong understanding of the complete MBIST flow, including:
  • MBIST insertion and integration
  • Top-level verification
  • Pattern generation using VecGen
  • Diagnostics and debug
  • RTL and gate-level simulation
• Strong knowledge of MBIST algorithms, including March algorithms.
• Experience with memory repair schemes such as BIRA/BISR, redundancy analysis, and spare row/column allocation.
• Experience with no-delay and with-delay simulations.
• Hands-on experience with silicon bring-up and post-silicon debug.
• Strong RTL, MBIST, and simulation debugging/root-cause analysis skills.
• Experience working with complex SoCs containing multiple memory instances.
• Proficiency with Verilog/SystemVerilog and standard DFT methodologies.
• Ability to work independently with minimal supervision.

Preferred Qualifications

• Experience with advanced SoC DFT integration.
• Familiarity with ATPG and scan insertion flows.
• Scripting experience with Tcl, Perl, or Python.
• Experience working in fast-paced semiconductor product development environments.