Senior Account Technical Executive II @Cadence Design Systems
All Others
Salary usd 248,000 - 3..
Remote Location
πŸ‡ΊπŸ‡Έ USA Only
Employment Type full-time
Posted 1mth ago

[Hiring] Senior Account Technical Executive II @Cadence Design Systems

1mth ago - Cadence Design Systems is hiring a remote Senior Account Technical Executive II. πŸ’Έ Salary: usd 248,000 - 372,000 per year πŸ“Location: USA

Role Description

  • Lead technical engagement for Digital IC/Custom IC / Analog / RF design flows, with a primary focus on Innovus and Virtuoso platforms along with signoff technologies.
  • Partner with customer design and CAD teams to optimize layout productivity, quality, and time-to-market.
  • Drive adoption of advanced capabilities such as:
    • Constraint-driven and automation-assisted layout.
    • Device-level and full-chip layout methodologies.
    • Advanced node layout challenges (FinFET, GAA).
    • EM and IR-aware layout and parasitic extraction flows.
  • Champion the integration of AI-driven design techniques, including:
    • Agentic AI workflows to automate design exploration, layout optimization, and verification tasks.
    • AI-assisted decision-making for layout trade-offs including PPA, matching, and parasitics.
  • Translate customer pain points into actionable requirements for R&D and product engineering.
  • Provide technical leadership in methodology definition, flow development, and best practices.
  • Influence competitive replacements and expand footprint of Cadence Custom IC solutions.
  • Support executive-level discussions by linking technical value such as PPA, productivity, and risk reduction to business outcomes.

Qualifications

  • Digital IC: Deep hands-on experience with digital design flow including Genus/Innovus, Quantus, Tempus and Pegasus.
  • Clear understanding of PPA trade-offs and other key concerns for design teams.
  • Ability to think full stack/flow – interconnect technologies and drive value proposition.
  • Experience working with design teams on large SOC tapeouts.
  • Understanding of foundry working model and care bouts – knowledge of PDK enablement, DTCO and technology entitlement a plus.
  • Custom IC and Virtuoso Expertise: Deep hands-on experience with the Cadence Virtuoso Platform, including:
    • Virtuoso Layout Suite (XL, GXL, EXL).
    • Schematic-driven layout and LVS flows.
    • DRC and physical verification integration.
  • Strong knowledge of custom analog and mixed-signal layout techniques, including:
    • Device matching, symmetry, common centroid, and shielding.
    • Parasitic-aware layout for high-performance analog and RF circuits.
  • Experience with the Spectre simulation environment and layout-to-schematic integration.
  • Familiarity with PCell development, layout automation, and scripting (SKILL preferred).
  • Agentic AI and Intelligent Design Automation: Strong understanding of AI and machine learning applications in semiconductor design, specifically:
    • Agentic AI frameworks such as multi-agent systems, goal-driven automation, and autonomous optimization.
    • AI-assisted layout generation and design space exploration.
    • Intelligent automation of repetitive design and verification tasks.
  • Experience or demonstrated interest in:
    • Applying AI to EDA workflows, CAD flows, or design methodology optimization.
    • Working with data-driven or reinforcement learning-based optimization approaches.
  • Ability to bridge AI innovation with practical design flows, translating emerging technologies into deployable customer solutions.
  • Design and Methodology Expertise: 5–10 or more years of experience in:
    • Custom IC, Analog, or RF design or layout engineering.
    • Mixed-signal design flows at block and full-chip level.
  • Deep understanding of:
    • Analog and RF design flows from schematic to signoff.
    • Physical verification, extraction, and post-layout simulation.
    • Advanced-node layout challenges and reliability considerations.
  • Experience with layout productivity optimization and methodology deployment at scale.

Requirements

  • BSEE required, MSEE or higher strongly preferred.
  • 5–10 or more years of experience in Digital IC, Custom IC, Analog, or RF design or layout.
  • Demonstrated expertise in Innovus-based and Virtuoso-based design environments.
  • Exposure to or strong interest in AI-driven design methodologies and agent-based automation frameworks.
  • Exposure to chiplet design flows, packaging and IP design a plus.
  • Strong collaboration and customer-facing experience.
  • Ability to travel approximately 25 percent, primarily within North America.

Benefits

  • Annual salary range for California is $248,000 to $372,000.
  • Eligible for incentive compensation: bonus, equity, and benefits.
  • Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
  • Benefits programs include:
    • Paid vacation and paid holidays.
    • 401(k) plan with employer match.
    • Employee stock purchase plan.
    • A variety of medical, dental and vision plan options.
Before You Apply
️
πŸ‡ΊπŸ‡Έ Be aware of the location restriction for this remote position: USA Only
β€Ό Beware of scams! When applying for jobs, you should NEVER have to pay anything. Learn more.
Senior Account Technical Executive II @Cadence Design Systems
All Others
Salary usd 248,000 - 3..
Remote Location
πŸ‡ΊπŸ‡Έ USA Only
Employment Type full-time
Posted 1mth ago
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️
πŸ‡ΊπŸ‡Έ Be aware of the location restriction for this remote position: USA Only
β€Ό Beware of scams! When applying for jobs, you should NEVER have to pay anything. Learn more.
Apply for this position
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Applied βœ“
Sent Follow-Up βœ“
Interview Scheduled βœ“
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