[Hiring] CUDA Engineer @Fuse Energy

Role Description

We're looking for a CUDA Engineer to write and optimise the low-level GPU code that powers our inference workloads. You'll design custom CUDA kernels, tune performance across memory bandwidth and compute bottlenecks, and squeeze maximum throughput out of every GPU in our fleet, working at the level of SMs, warps, and memory hierarchies.

The Opportunity:

• Fuse is in active discussions with major AI compute customers who need data center capacity across the markets we operate in, primarily for inference.
• Demand significantly outpaces what we can currently build, meaning speed to power, reliability, and deployment cost matter more than specific hardware choice.
• This puts CUDA/GPU performance engineering at the center of how Fuse serves some of the largest compute buyers in the market.

Responsibilities

• Write and optimise custom CUDA kernels for core transformer inference operations.
• Profile kernels to identify and eliminate bottlenecks in occupancy, memory throughput, and warp divergence.
• Apply kernel fusion to reduce memory round-trips and launch overhead across inference pipelines.
• Optimise memory access patterns and manage the memory hierarchy for maximum bandwidth utilisation.
• Implement quantisation-aware kernels and mixed-precision arithmetic to reduce latency and memory footprint.
• Build and tune caching mechanisms for efficient autoregressive decoding.
• Tune kernel launch configurations for target GPU architectures.
• Benchmark kernels against existing baselines and drive measurable throughput and latency improvements.
• Write tests for CUDA code to catch performance and correctness regressions.
• Maintain internal CUDA libraries and contribute to team coding standards and documentation.

Qualifications

• 4+ years writing production CUDA code, with a track record of shipping performance-critical kernels.
• Deep understanding of GPU microarchitecture, warps, occupancy, register pressure, and memory hierarchy.
• Strong CUDA C++ skills, including streams and asynchronous execution.
• Hands-on experience profiling to diagnose compute-bound vs. memory-bound bottlenecks.
• Experience with kernel fusion, memory coalescing, and avoiding warp divergence.
• Experience writing quantised and mixed-precision kernels.
• Solid grasp of parallel algorithm design and numerical precision tradeoffs.

Nice to Have

• Experience with transformer/attention-style kernels or autoregressive decoding.
• Experience building high-performance GPU libraries from scratch.
• Background in HPC or other latency-critical performance engineering.
• Exposure to multi-GPU or multi-node kernel-level optimisation.
• Comfortable reading PTX/SASS to validate kernel efficiency.

Benefits

• Competitive salary and an equity sign-on bonus.
• Biannual bonus scheme.
• Fully expensed tech to match your needs.
• Breakfast and dinner allowance for office based employees.