[Hiring] Silicon Design and Design Verification Engineer @Infowaysolutions

Role Description

• Design and implement digital and mixed-signal circuits for semiconductor products.
• Develop RTL (Register Transfer Level) designs using Verilog or VHDL.
• Conduct synthesis, static timing analysis (STA), and power analysis.
• Implement and optimize digital designs for performance, power, and area (PPA).
• Develop testbenches and perform functional verification using SystemVerilog/UVM.
• Write and maintain verification test plans, test cases, and test benches.
• Conduct RTL simulations and debug design issues.
• Collaborate with cross-functional teams including architecture, physical design, and software/firmware.

Qualifications

• Bachelor's/Master's degree in Electrical Engineering, Computer Engineering, or related field.
• Minimum 5 years of industry experience in silicon design and/or design verification.
• Proficiency in RTL design using Verilog or VHDL.
• Experience with synthesis, STA, and power analysis tools (Synopsys, Cadence, Mentor).
• Hands-on experience with ASIC/FPGA design flows and methodologies.
• Strong understanding of digital design concepts and methodologies.
• Experience with scripting languages (e.g., Perl, Python, Tcl) for automation.
• Excellent problem-solving and debugging skills.
• Good communication skills and ability to work effectively in a team environment.

Requirements

• Experience with low-power design techniques and methodologies.
• Knowledge of analog/mixed-signal design principles.
• Familiarity with verification methodologies such as UVM (Universal Verification Methodology).
• Experience with EDA tools for design and verification (Cadence, Synopsys, Mentor).
• Understanding of formal verification techniques.