[Hiring] IP Integration Engineer @Apolisrises

Role Description

• Good in understanding RTL Design and Digital concepts
• Subsystem or SoC integration
• Integration of 1P and 3P IPs, generating 3P fabrics, quality checks, and PD handoff
• SS integration using Verilog/System Verilog
• Synthesis, timing constraints, floor-planning considerations, performance optimization, and design-quality closure including CDC, Lint, and RDC, register integration
• Ensure customer satisfaction
• Reporting to customers on daily or weekly progress effectively

Qualifications

• Requires in-depth knowledge and experience
• Solves complex problems; takes a new perspective using existing solutions
• Works independently; receives minimal guidance
• Acts as a resource for colleagues with less experience
• Represents the level at which career may stabilize for many years or even until retirement
• Contributes to process improvements
• Typically resolves problems using existing solutions
• Provides informal guidance to junior staff
• Works with minimal guidance
• Typically requires 5–7 years of related experience with a 4-year degree; or 3 years and an advanced degree; or equivalent work experience

Company Description