[Hiring] Staff Analog Design Engineer @Tenstorrent

Role Description

Tenstorrent is seeking a Staff Analog/Mixed Signal Design Engineer to join our Analog Design team. In this role, you’ll develop differentiated die-to-die chiplet PHY IP solutions including PLLs.

• Develop die-to-die chiplet PHY IP, including PLLs and key analog/mixed-signal blocks in deep sub-micron FinFET technologies.
• Own the full lifecycle: design, verification, layout interaction, tape-out, and silicon bring-up to production quality.
• Collaborate with architecture, analog, digital, verification, layout, and software teams to integrate and optimize AMS IP.

Qualifications

• BSEE/MSEE/PhD with 10 years of relevant analog/mixed-signal IC design experience, including PLL and AMS design in FinFET processes.
• Proficient with industry-standard EDA tools and comfortable working closely with layout.
• Experienced with circuit/SoC tape-outs that reached production, confident in silicon bring-up and testing.
• A collaborative, data-driven engineer—able to analyze, document, and present results.
• Background in high-speed datacomm/SerDes and die-to-die PHY design.
• Experience with circuits such as bias generators, amplifiers, LDOs, switched-cap circuits, oscillators, ADCs, DACs, Tx/Rx sub-circuits, and DDR/PCIe/USB PHY components.
• Familiarity with high-speed digital (serializer/deserializer, dividers) and Tx/Rx equalization (de-emphasis, CTLE, DFE).

Requirements

• Ability to push the limits of die-to-die chiplet PHY IP in advanced FinFET nodes, from architecture through high-volume production.
• Co-optimize analog, digital, and layout to hit aggressive performance, power, and area targets in complex SoCs.
• Deeper expertise in high-speed I/O and PHY architectures, plus practical methodologies for scalable, reusable AMS IP across multiple products.

Benefits

• Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets.
• Highly competitive compensation package and benefits.