[Hiring] FPGA Engineer @Ludwig Computing

Role Description

We are looking for a technically exceptional and intellectually curious Hardware FPGA Engineer who is passionate about hardware acceleration and wants to work on cutting-edge compute platforms. You will work directly with the founding team to assist in implementing and validating core logics, processing algorithms, and other subsystems. This is a hands-on, research-meets-build role in developing custom blocks for advanced computational workloads. This internship is primarily focused on FPGA architecture, implementation, verification, and testing, with opportunities to explore ASIC-relevant design flows and system-level integration in support of broader architectural development. Candidates interested in system-level digital prototyping and early-stage accelerator development are encouraged to apply. You must be comfortable working in a fast-paced team environment on a variety of R&D, proof of concept, and production programs.

Responsibilities

• Translate architectural concepts into FPGA prototypes
• Design and simulate custom processing modules using Verilog, VHDL, or high-level synthesis (HLS)
• Implement and validate processing components on FPGA platform using industry-standard tools (e.g., Vivado, Quartus, or OpenCL-based flows)
• Benchmark performance and optimize tradeoffs in latency, area, throughput, and memory bandwidth
• Build testbenches, run timing/area analysis, and assist with system integration
• Work collaboratively with system architects, FPGA design engineers, and embedded software engineers
• Be responsible for generating and executing the FPGA Verification Test Plan and FPGA Verification Matrix.

Requirements

• Experience with FPGA development, RTL or HLS-based design in Verilog/SystemVerilog, VHDL, or C++
• Experience with FPGA development tools (Vivado, Quartus, or equivalent)
• Solid electronic circuit design and electronic systems background
• Expertise of digital logic fundamentals, including pipelining and timing closure
• Digital system partitioning and advanced function implementation in FPGAs
• Experience with memory mapping and hierarchy on FPGA
• Strong skills in simulation, debugging, and synthesis workflows
• B.S. degree or higher in engineering (preferably Electrical Engineering, Computer Science)

Bonus if You Have

• Experience with OpenCL or HLS-based design targeting FPGA
• Experience with hardware/software co-design and system-level integration
• Project experience in digital design, computer architecture, or embedded systems
• Exposure to numerical computing, AI workloads, or custom arithmetic units
• Exposure to ASIC design concepts, such as synthesis, floor planning, or RTL-to-GDS toolchains
• Familiarity with high-speed interfaces
• Familiarity with analog or mixed-signal concepts

What You'll Gain

• Opportunity to work on next generation AI compute architectures
• Hands-on experience building novel, high-speed, energy-efficient compute accelerators on FPGAs
• Opportunity to build skills that bridge into ASIC flows, including RTL quality, test benching, and synthesis-readiness
• Experience in connecting cutting-edge AI concepts to both low-level digital and potentially mixed-signal implementations
• Mentorship from a team with expertise in hardware-software co-design, digital architecture, and early-stage prototyping