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DFT (Design-for-Test) & ATPG Engineer
@HIKINEX
[Hiring] DFT (Design-for-Test) & ATPG Engineer @HIKINEX
Mar 18, 2025 - HIKINEX is hiring a remote DFT (Design-for-Test) & ATPG Engineer. 💸 Salary: unspecified. 📍Location: USA.
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Role Description
We are looking for a DFT and ATPG specialist to contribute to the development and validation of digital test methodologies. The ideal candidate will have experience in scan chain design, fault modeling, and test pattern generation, with a strong understanding of industry-standard DFT architectures and techniques.
- Develop and implement design-for-test strategies including JTAG (1149.1, 1149.6, 1687), IEEE 1500, scan chains, and logic BIST.
- Work with JTAG/1500/1687 test infrastructures, including writing and interpreting BSDL, ICL, and PDL files.
- Optimize test compression, on-chip clocking, and apply various logic fault models (e.g., stuck-at, transition, bridging, cell-aware, timing-aware fault models).
- Perform scan insertion, automatic test pattern generation (ATPG), coverage analysis, and pattern validation to ensure high fault detection.
- Utilize Cadence Modus/Genus or Mentor Tessent/MBIST Architect for test implementation and validation.
- Develop automation scripts using TCL, Python, or Perl to enhance test and verification workflows.
- Collaborate on post-silicon validation, including pattern conversion for ATE, silicon bring-up, debug, and characterization.
- Work closely with backend design teams on aspects like timing analysis, clock domain crossing (CDC), and chip integration.
- Apply memory BIST (MBIST) techniques, including test algorithms and IO loopback strategies.
Qualifications
- Expertise in digital test methodologies and DFT feature implementation.
- Strong working knowledge of fault modeling and ATPG techniques.
- Hands-on experience with DFT tools from major EDA vendors.
- Proficiency in scripting languages for automation.
- Experience in post-silicon debug, ATE pattern validation, and silicon characterization is beneficial.
- Exposure to backend chip design flows, timing closure, and advanced MBIST architectures is an added advantage.
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| 📍 | Be aware of the location restriction for this remote position: USA |
| ‼ | Beware of scams! When applying for jobs, you should NEVER have to pay anything. Learn more. |
Back to Remote jobs >
All others
All others
|
Salary
💸
unspecified
|
Remote
Location
USA
|
|
Job Type
contract
|
Posted
Mar 18, 2025
|
️
| 📍 | Be aware of the location restriction for this remote position: USA |
| ‼ | Beware of scams! When applying for jobs, you should NEVER have to pay anything. Learn more. |
